2 UCSC HW Systems Collective, TDC
2 : UCSC HW Systems Collective, TDC
- Author: Tyler Sheaves, Phillip Marlowe, & Dustin Richmond
- Description: A tiny TDC constructed entirely of standard cells. Skywater130 FA-2 delay element
- GitHub repository
- GDS submitted
- HDL project
- Extra docs
- Clock: 17241379 Hz
How it works
A tiny TDC
How to test
Setup VCS on you local machine, cd to test run:
make SIM=vcs GATES=yes
External hardware
Just pins
IO
# |
Input |
Output |
Bidirectional |
0 |
lanuch clock |
hw[0] |
|
1 |
capture clock |
hw[1] |
|
2 |
pg_src |
hw[2] |
|
3 |
pg_bypass |
hw[3] |
|
4 |
pg_in |
hw[4] |
|
5 |
pg_tog |
hw[5] |
|
6 |
valid_in |
hw[6] |
|
7 |
|
valid_out |
|
Chip location