386 Elemental Harmony Game

386 : Elemental Harmony Game

Design render
  • Author: Aakarshitha Suresh
  • Description: Elemental Harmony is a silicon-based 4 * 4 strategy game, like Tic-Tac-Toe, where players compete against a logic engine to score points by matching elemental patterns across a digital grid.
  • GitHub repository
  • Open in 3D viewer
  • Clock: 10000000 Hz

How it works

🌟 Elemental Harmony A TinyTapeout Puzzle of Balance and Chaos

🎯 Objective Bring balance to a 4×4 elemental board by placing patterns (Air, Water, Fire, Earth) such that harmony outnumbers chaos. Win by creating rows or columns that embody elemental cooperation. Lose if conflict overtakes the board — or if you exhaust your allowed retries.

🌍 The Elements & Their Patterns Elemental Patterns

Each pattern has its own personality => some blend, others clash.

Elemental Harmony is a silicon-native strategy game implemented as a TinyTapeout-compatible hardware module. It utilizes an internal 16-bit occupancy register to manage a 4 * 4 grid, where a Finite State Machine (FSM) coordinates turns between a human player and an internal logic engine. The engine uses a Linear Feedback Shift Register (LFSR) to search for empty tiles and calculates scores based on adjacent "elemental" pattern matches using a combinational adder tree. A unique feature of the architecture is its tri-state error reporting system: if a player attempts to place a pattern on an occupied tile, the FSM transitions through a sequence of diagnostic states (ERROR1 through ERROR3) that stream the current board occupancy and fill-count back to the interface, allowing for external recovery and move retry without a full system reset.

PAIRWISE PATTERN SCORE TABLE As created in the specifications of the design Elemental Harmony. Here is the complete 8×8 Pairwise Pattern Score Table exactly as defined in the spec. Definition: Row = newly placed pattern Column = existing neighboring pattern (N/E/S/W) Values: +2 (strong), +1 (mild), 0 (same), −2 (conflict)

Elemental Patterns

How to test

To verify the design, pull rst_n low to initialize the grid, then provide a 4-bit tile address and 3-bit pattern on ui_in before pulsing the Start bit (ui_in[7]). Monitor the uo_out port for the resulting Harmony score, which is valid when the strobe bit (uio_out[0]) is high. To test the robustness of the error-handling logic, intentionally attempt to place a pattern on a previously occupied tile; observe the FSM transition into the error states and verify that uo_out sequentially outputs the fill status and the 16-bit occupancy map (split into two 8-bit chunks). The test is successful if the system returns to the IDLE state after an error, ready to accept a corrected move at a valid, non-colliding position.

IO

#InputOutputBidirectional
0h_pos[0]uo_out[0]design_done_strobe
1h_pos[1]uo_out[1]fsm_state_out[0]
2h_pos[2]uo_out[2]fsm_state_out[1]
3h_pos[3]uo_out[3]fsm_state_out[2]
4h_pat[0]uo_out[4]fsm_state_out[3]
5h_pat[1]uo_out[5]unused_input[0]
6h_pat[2]uo_out[6]unused_input[1]
7start_pulseuo_out[7]unused_input[2]

Chip location

Controller Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux tt_um_chip_rom (Chip ROM) tt_um_factory_test (Tiny Tapeout Factory Test) tt_um_Vincent2405_adder_tree (BSD Convolution Adder Tree) tt_um_BastiBudde_i2c_slave_sensor (I2C Slave Template with Emulated Sensor) tt_um_60hz_load (60 Hz Grid-Forming ASIC with Dump-Load Control) tt_um_spi_config_reg (Simple SPI configuration for analog designs) tt_um_ex_drosen766 (Project) tt_um_spi_cpu_top (SPI-CPU) tt_um_d5smith_mfa (Music for ASICs) tt_um_i2c_master (I2C Master Controller) tt_um_aswarby_mac (Aswarby INT8 MAC) tt_um_arrakeen_spsram_direct (TT-Arrakeen-SPSRAM-direct) tt_um_alu (8-bit Interactive ALU) tt_um_JCT_PoC (ttgf jct PoC) tt_um_jct_lea (LEA-128) tt_um_cwru_cpu (CWRU CPU) tt_um_teapot (100Mbps Ethernet Accelerator Wrapper) tt_um_jte_cordic (CORDIC sin/cos generator) tt_um_aidenkoch4 (Three Channel RGB PWM Controller) tt_um_pschuetz_tremolo (Tremolo guitar pedal ASIC) tt_um_jsabree11_fibonacci_checker (fibbonaci_tt) tt_um_connerdaehler_boop (Procedural ASIC) tt_um_Kieckenwama_Traffic_LIGHT_FSM (Traffic Light FSM) tt_um_KimLuu02_WashingMachine_FSM (WashingMachine_FSM) tt_um_PaulineKreis_PWM_Analyser (PWM-Analyser) tt_um_PWM (PWM Generator) tt_um_wokwi_466666882406199297 (Simple Sprinkler) tt_um_rebeccargb_universal_decoder (Universal Binary to Segment Decoder) tt_um_rebeccargb_hardware_utf8 (Hardware UTF Encoder/Decoder) tt_um_spi_master (SPI Master Slave Communication) tt_um_likitha_trng (Secure TRNG Entropy Generator) tt_um_wnn (8-bit WNN Pattern Recognizer) tt_um_raksha (Raksha) tt_um_uart_soc (UART_SOC) tt_um_ecdsa_verify (ECDSA Verification) tt_um_ecc_processor (ECC Processor) tt_um_fast_auth (Fast Authentication Accelerator) tt_um_karthik_trng (TRNG using Ring Oscillator) tt_um_push (Secure V2X Mini Demonstrator) tt_um_santosh_aes_sbox (AES S-Box Accelerator) tt_um_hardware_anomaly_detection (Hardware Anomaly Detection) tt_um_multi_protocol (Multi-Protocol Communication Controller) tt_um_pqc_ntt_butterfly (PQC NTT Butterfly Core) tt_um_cambridge_nlfsr (Programmable Chaotic NLFSR) tt_um_4b_accumulator_cpu (4 bit Accumulator CPU) tt_um_spi_slave (SPI Slave with 8-Register File) tt_um_geeta_doddamani_lfsr (4-bit Maximum-Length LFSR) tt_um_ecc_accelerator (ECC Scalar Accelerator) tt_um_egurapha_chacha20 (ChaCha20) tt_um_configurable_pwm (Configurable PWM Generator) tt_um_Arctic0 (Arctic0 16-bit CPU) tt_um_comp8 (8-bit Comparator) tt_um_pwm_cit (Configurable 8-bit PWM Generator) tt_um_rameshwar_door_lock (Digital Door Lock) tt_um_sandy_venky (8-bit LFSR Circuit) tt_um_ljhahne_pong (Pong) tt_um_v2x_warning (V2X Collision Warning) tt_um_ecc_scalar_mult (ECC Scalar Multiplication) tt_um_fhw_appel_spiPWMio (spiPWMio) tt_um_arrakeen_spsram_direct_sramrules (TT-Arrakeen-SPSRAM-direct-sramrules) tt_um_arrakeen_spsram_direct_5v (TT-Arrakeen-SPSRAM-direct-5V) tt_um_LukeSilva_cartrip (Car Trip) tt_um_coffeepot (100Mpbs 3 port Ethernet switch) tt_um_emiliopeju_lightscan (Lightscan) tt_um_Alanduan21_triad01_top (triad01) tt_um_lif_snn (4-Neuron LIF Spiking Neural Network) tt_um_smerity_mandelbrot (Smerity-Mandelbrot) tt_um_elvtide01_7SegmentDice (7SegmentDice) tt_um_elemental_harmony (Elemental Harmony Game) tt_um_pattern_gen (Programmable Waveform and PWM Generator) tt_um_antimatter15_pdm_vad (PDM Voice Activity Detector) tt_um_layla_spike_detector (Neural Spike Detector) tt_um_detronyx_arith_lab (Detronyx Arithmetic Lab Tile) tt_um_hasheddan_nni (Nearest Neighbor Interpolation) tt_um_brisq (BRISQ) tt_um_santhosh_spike_codec_gf (Neuromorphic Spike Codec (GF180)) tt_um_santhosh_aer_router_gf (Asynchronous-AER Spike Router (4-phase REQ/ACK, 16-entry routing table, GF180)) tt_um_santhosh_snn_wta_gf (Spiking Neural Network WTA Inference Engine (GF180)) tt_um_santhosh_cim_bist_gf (CIM Controller with BIST and Fault Map (GF180)) tt_um_santhosh_neuro_puf_gf (Neuromorphic PUF (distinct-tap LFSR arbiter + memristor XOR, GF180)) tt_um_detronyx_uart_trace_exerciser (Detronyx UART Trace Exerciser) tt_um_ro_puf (Tiny RIng Oscillator PUF) tt_um_franretfie_top (Quadrature sine generator) tt_um_cherny_xor_8bi (XORing given bits) tt_um_mealycpp_ascon_sdmc_uart (ASCON Integrated Crypto Processor) tt_um_reflex_s4 (AER Reflex Chip - MCP2515 CAN gateway) tt_um_polytrig_core (PolyTrig Digital Waveform Synthesis Core) tt_um_waferspace_vga_screensaver (Wafer.space Logo VGA Screensaver) tt_um_2048_vga_game (2048 sliding tile puzzle game (VGA)) tt_um_urish_simon (Simon Says memory game) Available