
An internal simple digital counter block can be driven by an external clock or an internal ring oscillator, and then be fed data through external pins. It will run as fast as it can to try and produce a result, which can then be read back out.
clock_sel=1 (internal ring oscillator is used as the clock source). Ring-osc clock, divided by 16, should be present on cdebug -- expected to be on the order of 12.5MHz to 25MHz.mode=0 (we're going to load the number of cycles for which we want the worker to run).clk. Expect done==0.shift loads each byte, in turn, via din[7:0]. First 2 bytes are a starting value (MSB first). The next 2 bytes are a cycle count. In mode==0 this cycle count is used, while in mode==1 it is repurposed as the addend for an adder experiment.done==1 when it finishes.dout[7:0] should be presenting the first byte (MSB) of the output data; shift out 4 bytes in total via dout[7:0] by raising shift each time again (which in turn loads 4 more bytes, so it will start again). The first 2 bytes out are the 'starting value' incremented by the counter value (i.e. it should be the starting value, plus the internal counter value), and the last 2 bytes are the internal counter value (which started at 0).Nothing special. Probably just an oscilloscope to see how fast it actually yields a result.
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | din[0] | dout[0] | shift |
| 1 | din[1] | dout[1] | clock_sel |
| 2 | din[2] | dout[2] | mode |
| 3 | din[3] | dout[3] | stop |
| 4 | din[4] | dout[4] | |
| 5 | din[5] | dout[5] | running |
| 6 | din[6] | dout[6] | done |
| 7 | din[7] | dout[7] | cdebug |