| 0 | Chip ROM | Uri Shaked | ROM with information about the chip |
| 1 | Tiny Tapeout Factory Test | Tiny Tapeout | Factory test module |
| 3 | Inverted inverters | Mikail Gedik | Long chain of inverters |
| 5 | Tiny FPGA | Yuri Honegger | A simple FPGA |
| 7 | 3LFCC PS-PWM Modulator | aaaaaa | Modulador phase-shift PWM con tiempo muerto para un convertidor Flying Capacitor de 3 niveles, con los dos ciclos de trabajo ajustables por pines |
| 9 | simple SPI flash streaming NPU | Léon Romanens | A simple NPU streaming weights form a SPI flash |
| 32 | 6-bit multi function ALU ( eldawly_V2) | ziad mokhtar | 6-bit ALU featuring RCA, CLA, multipliers, logic, shifts, popcount, and comparison operations |
| 34 | Preinception: Simple Compute Accelerator | Aakash KT | Simple compute accelerator, connected via USB and driven with a C++ API and code on the host PC. |
| 42 | AION | Filippo Quadri | 32-bit and 16-bit posit arithmetic unit behind a byte-wide register interface |
| 102 | Scalable Banked L1 Memory Fabric for Edge AI | Vishnukumar Varatharaja Perumal | DFF-based silicon demonstrator of a scalable banked L1 weight memory fabric with DMA streaming and GEMM MAC, ported to IHP sg13g2 |
| 104 | IEEE Bandgap Reference | Paweł Pobłocki | IHP Analog Academy BG design example |
| 106 | LDO | Youssef Emad | LDO circuit |
| 128 | iTALU: Interactive Testable Arithmetic Logic Unit | Your Name | 8-bit ALU with DFT features including BIST and scan chain |
| 130 | VGA Flower | Laura, Matt & Claude | Races the beam to draw a flower on a VGA display, no frame buffer |
| 132 | 4-Bit Charge-Redistribution SAR ADC Controller | Josue Olivos | Three selectable digital controllers for an external 4-bit charge-redistribution SAR ADC: clean, manually enabled Trojan, and automatically triggered Trojan designs. |
| 134 | Laser Gyro Lock-in Readout Core | Marco Flückiger | Open-loop lock-in demodulator for the digital readout electronics of a single-axis laser gyroscope (fiber-optic interferometer) |
| 136 | Timing-Prediction Test Vehicle | ECHO-HELLO-WORLD424 | Half-cycle self-checking arithmetic timing-failure test vehicle with ring-oscillator delay canaries (pre/post-silicon timing-prediction study on IHP SG13G2) |
| 138 | Four-Metric VGA Nearest-Prototype Visualizer | zanderivo | 640x480 VGA nearest-prototype visualizer with four selectable distance metrics, manual prototype moves, and online training. |
| 160 | SENT to I2C bridge | Enzo Nappi | Full-duplex SAE J2716 SENT decoder + encoder bridged to an I2C register-map slave |
| 161 | FPU-130 | Aarush & Yogith | a FPU for the 16bfloat format that takes commands over SPI |
| 162 | UART-SPI-I2C Bridge | Catalin Lazar | UART-controlled protocol bridge with an SPI master (4x CS, configurable CPOL/CPHA) and an I2C master (clock stretching), driven by a command interpreter with FIFO buffering and a memory-mapped register file. Fully testable standalone via UART commands, with a built-in loopback self-test mode. |
| 164 | ChipLab | Jörn Hoffmann | Educational digital logic experiments |
| 166 | AstraPIO | Fabien | General-purpose programmable IO prototype; not ready for tapeout |
| 168 | Kraken IO Subprocessor | Matthias Musch | A PIO-like state machine that runs short pioasm scripts |
| 170 | snake game | Valeria Molano, Luisa Fernanda Avendaño, Juan David Guerrero | This is a simple snake game project selected as the best course project from the 'Digital Asic Design' 2025-2 course at Universidad Pedagogica y Tecnologica de Colombia |
| 194 | AdExp DPI Neuron | Saptarshi Ghosh | Adaptive Exponential Integrate-and-Fire Neuron |
| 202 | snn-voice-calculator | mauro | snn-powered voice recognition single digit calculator |
| 203 | Tiny FABulous FPGA | Leo Moser | A tiny FABulous FPGA fabric, ready for use with Yosys and nextpnr. |
| 224 | Configurable Low-Latency Match-Action Packet Processor | Giulio Girelli | Configurable low-latency packet-processing ASIC with programmable match-action classification |
| 225 | Universal Binary to Segment Decoder | Rebecca G. Bettencourt | Decodes various binary codes to various segmented displays. |
| 226 | OMEGA INFINITY KAORU 3D Metal Grid Processor | Kaoru Aguilera Katayama | Physical BEOL 3D metal wire grid mesh coupled to a CMOS Circuit-SAT engine |
| 227 | INTERCAL ALU | Rebecca G. Bettencourt | An ALU for the five operators of the INTERCAL programming language. |
| 228 | MC14500B Extended 1-bit Microcontroller SoC | Alexander Co Abad | An advanced 1-bit MCU SoC containing an MC14500B Core, 256-word ROM, 16-bit RAM, and dual IO expansion ports |
| 229 | IEEE Flappy Bird VGA Game | Escobar Mamani Alejandra Heidi | Flappy Bird hardware game with parallax scrolling for TinyVGA PMOD |
| 230 | stapel gerät | Nicolas Tscherter | stack based cpu |
| 231 | ALU CASS PUCV | CASS PUCV | ALU de 8 bits con interfaz serial de 24 pines (FSM de 3 estados); soporta operaciones aritméticas, lógicas y de desplazamiento vía opcode de control. |
| 232 | Ring oscillator frequency meter | Maxwell Pauly | Reciprocal frequency counter that measures any of eight on-chip ring oscillators (incl. a trimmable one) and reports the count over the pins |
| 233 | S4xU4 | Yann Guidon | 4×4 bit multiplier with Tiny Tapeout in Verilog on IHP SG13G2 |
| 234 | IEEE Workshop Simple CPU | Hadjer Bouyahiaoui, Maria Debbaghi | 8-bit accumulator CPU using a real IHP 256x8 SRAM macro for data memory; multi-cycle to tolerate the macro's registered read latency |
| 235 | Space CA | Alexander Mordvintsev | VGA demo: Giant Computer in Space |
| 257 | Endless Runner | Bianca Manganaan | VGA endless driving game with a procedurally generated road, obstacles and scenery |
| 259 | KIBO Leak-Inspection Target Controller (VGA) | Your Name | 8-state leak-inspection approach/align/inspect FSM with a live 640x480 VGA status display and a latched safety abort. |
| 260 | TinyQV SoC (Dual Memory Backend) | LKhanh | TinyQV RISC-V SoC supporting both QSPI PMOD and RP2040 spi-ram-emu |
| 261 | SEQ8 Programmable Sequencer | JET | 8-instruction programmable sequencer driving 8 output pins |
| 263 | tt_um_vga_slot_machine | Lerist Lagman | a slot machine |
| 265 | CDM PYTHON GAME | VINCE LUCES | A hardware-rendered VGA Snake Game in Verilog with growing mechanics and dual keyboard/PMOD controls. |
| 266 | Frozen ternary backbone + loadable head | Rahul Mascarenhas | 8x8 image classifier. Frozen ternary feature layer compiled into logic; 6-class head reloaded over SPI. |
| 267 | UART Hello World | Rom DuPlain | Continuously transmits a hello-world message over the demoboard USB UART |
| 352 | Mixer | Niklaus Leuenberger | Mixed-signal experimentation |
| 354 | TinyDMA: A Descriptor-Based Dual-PSRAM Memory Mover | bennett_lahn | TinyDMA bulk-copies between dual QSPI PSRAM using in-memory descriptors |
| 356 | Digital IQ Lock-in (IEEE) | Gabriela Sheilyn Ticona Jimenez | Dual-phase digital demodulator with programmable block averaging — Equipo Triada CEG |
| 357 | Izhikevich event bridge (4 contexts) | Austin Biaselli | Four-context time-multiplexed fixed-point Izhikevich neuron bank with programmable synapses and external digital spike capture |
| 358 | PS/2 Keyboard Decoder for 68k | Ben Payne | A PS2 keyboard decoder for retro 68k systems (IHP SG13G2) |
| 360 | Neurona LIF con Aprendizaje STDP Dinamico (IEEE) | Casandra Saray Galiano Quillahuaman | Neurona artificial biologica con plasticidad configurable y monitoreo de peso en tiempo real. — Equipo Triada CEG |
| 361 | Multi Segment Monitor | Matt Venn & Claude | Simulates a 64x37 array of 7 segment displays on a VGA screen |
| 362 | CDM Matrix | Gian | Colegio de Muntinlupa MicroElectronics2026! |
| 363 | EZ130 8T Mystery Circuit | Oscar Castaneda and Thomas Herzog | A mystery circuit implemented with EZ130 8T cells |
| 384 | Hardware UTF Encoder/Decoder | Rebecca G. Bettencourt | Converts Unicode code points between UTF-8, UTF-16, and UTF-32. |
| 385 | VGA Pride | Rebecca G. Bettencourt | A VGA demo for showing pride flags |
| 386 | IEEE_UPB_TT_1 | Rodolfo Gironda Trujillo | A basic digital design (using only logic gates) used in a class for beginners. |
| 387 | SENT Receiver with SPI Interface | Philipp Kraft | Configurable SENT receiver with SPI slave interface |
| 388 | Smart Traffic Light Controller | Kaisy Maina | A smart traffic light controller with pedestrian and emergency controls |
| 390 | IEEE Digital EEG Threshold Event Detector | Jacob Kebaso | A digital threshold-crossing event detector with hysteresis and a refractory period, intended as the event-detection stage downstream of an external ADC digitizing an EEG signal. No analog pins are used; all thresholding and hysteresis logic is implemented digitally. |
| 391 | UART SPI RAM Loader | romd | CRC-protected UART loader for a 64 KiB SPI SRAM |
| 392 | 8N1 UART Transceiver | NUAT Labs | Full-duplex 8N1 UART transceiver (TX + RX) with runtime bidirectional data bus and mid-bit sampling |
| 394 | Async FIFO with CDC + PWM Peripheral | NUAT Labs | 8-deep async FIFO with Gray-code CDC and live 7-seg occupancy display, plus a small reusable PWM peripheral |
| 395 | Hepiarisc with SPI flash | Léon Romanens | A Hepiarisc processor fetching instructions over a SPI flash |
| 416 | 1D CA/GO/SO CFAR radar detector | Lars Nitschke | A constant false alarm rate detector for pulse radar, processing one 8-bit magnitude sample per clock and emitting one detection decision per range cell, with cell-averaging, greatest-of and smallest-of variants selectable at runtime. |
| 417 | Circuitli C061618G2 | circuitli | A clockless MMU with an integrated anti-glitch filter network for 8-bit processors with a 16-bit address bus. |
| 419 | LayerNorm | Jakubie | 8-element LayerNorm accelerator |
| 421 | QAMER CryptoUART: Encrypted UART with LED Status | QAMER | UART echo with LFSR-based byte encryption and LED activity status. |
| 423 | DSP MAC Engine | Maaz Ahmed Khan | 8x8 signed multiply-accumulate engine with byte-serial I/O |
| 425 | 4-Tap Signed MAC Unit | Mohammed Abdul Mujeeb | Four-tap signed multiply-accumulate unit for DSP and dot-product operations. |
| 426 | PRISM with Risc-V (TinyQV) SoC | Ken Pettit with Michael Bell's TinyQV | A PRISM controller suported by a TinyQV Risc-V SoC |
| 427 | 4-Input Signed Neuron / Perceptron | Mohammad Musharaf Qureshi | Compact 4-input signed perceptron accelerator with ReLU activation and 8-bit output saturation. |
| 449 | Oscillator Ising Machine | Ryan Hasenfratz / Hasi Industries | Eight coupled ring oscillators that solve MAX-CUT by phase relaxation |
| 451 | Tbilisi CORDIC Engine | Levan Chagelishvili | A fixed-point CORDIC engine that calculates sine and cosine using iterative shift-and-add operations. |
| 453 | miniMAC_IHP26b | Yann Guidon | 16-bit Scrambler/Framer/Error detector for TTIHP26 run |
| 455 | SG13G2 Mystery Circuit | Oscar Castaneda and Thomas Herzog | A reference SG13G2 implementation for the EZ130 mystery circuit |
| 457 | EZ130 7T Mystery Circuit | Oscar Castaneda and Thomas Herzog | A mystery circuit implemented with preliminary EZ130 7T cells |
| 459 | Mini 8-bit Accumulator CPU | Rodgers Odiwuor | A tiny Von Neumann 8-bit accumulator CPU with a 16-instruction ISA (load/store, add/sub, bitwise logic, jump/jump-if-zero/jump-if-carry, output, halt). |
| 481 | Tiny Dual-Channel DRAM-PIM Controller + PU | Corey Lammie | Standard-cell DRAM-like controller with a shared near-bank PU |
| 483 | IEEE DOORSH | Koło Naukowe BAZA, Politechnika Warszawska — ZT, PN, MK, JT, KK | PIN-authorized SIMON64/128 challenge-response authenticator with a 4x4 keypad and passive buzzer |
| 485 | ULSR demo | Yann Guidon | Ultracompact 2-pin scan chain |
| 487 | ieee_tt_tinyopt4 | Berthyn Rodrigo Tinini Chuquimia | 4-tap LMS adaptive update engine for FIR system identification |
| 489 | IEEE VGA Animated Beach | Jose Miguel Caicedo Ortiz | This project implements a dynamic 640x480 VGA beach scene animation for the Tiny Tapeout platform using pure combinational logic. The hardware generates a rhythmic moving tide, a sun with twinkling rays, a flying airplane, a palm tree, and a beach ball with a projected shadow. It utilizes a 6-bit RGB palette and internal frame counters to render and animate complex geometric shapes without requiring external RAM. |
| 491 | IEEE Acoustic Drone Detector | Jędrzej Hasiura, Grzegorz Pawelski | Self-contained acoustic drone detector: PDM microphone in, detection signal out. |
| 513 | Low-Power LFSR-Based Test Pattern Generator | Umamaheswari Ramalingam | An 8-bit LFSR-based pseudo-random test pattern generator for VLSI testing. |
| 515 | Mini 8-bit Processor | Jorge Gutierrez | An 8-bit processor with a custom-designed instruction set and hardware-level experimentation |
| 517 | uart | bella | basic uart w rx and tx |
| 519 | Sine Wave Synthesizer | Alberto Beccari | This tile synthesizes sine waves in the audio frequency range by means of a CORDIC engine and pulse-density modulation. |
| 521 | tt_um_adxl362_test | Barry Kane | A SPI to UART bridge for an ADXL362 |
| 523 | 4 Channel - 32 Tap Programmable Delay with Delay Locked Loop Calibration | han | Delays a signal by between 0 and up to 31 taps, with each tap providing 0.625 ns of delay, resulting in a maximum total delay of 19.375 ns when using a 50 MHz external reference clock. |
| 544 | Proof | Kush Shah | Fixed-point dot-product engine that estimates the glycemic response of a meal |
| 545 | DNA_Accel | Garv R Jain, Suhani Das, Dr. Vishal Gupta | SPI-driven hardware accelerator for transition/transversion-aware DNA sequence comparison |
| 546 | nanoPIO | catalinlazar | A tiny bit-banged programmable I/O engine (RP2040 PIO-inspired) with a reprogrammable 16-word instruction store, used to emulate UART/SPI/I2C timing. |
| 547 | Colegio de Muntinlupa DVD-like Display | CDM | Colegio de Muntinlupa DVD-like Display |
| 548 | Circuitli C061618G2TR | circuitli | A triple redundant clockless MMU module with an integrated anti-glitch filter network for 8-bit processors with a 16-bit address bus. |
| 549 | Morse Tree LED Decoder | Matthias Wegmann | Reads a Morse key and lights the matching node of the Morse code tree on an 8x8 LED matrix |
| 550 | Tiny_Divider | OzelHD | Divide two numbers |
| 551 | tt_um_vga_hypno_spiral | Joshua Azriel Cuarteron | Black & White Hypnotizing Background |
| 552 | TinyAnalogExperiments | Hackin7 | Dual ring oscillators (100/500 MHz) and 64-bit counter |
| 553 | 3x3 Clock Rate Streaming Input Convolution Engine | Yahya Numan Incirkus | 3x3 linear convolution through a singular MAC unit, 8-bit pixel input 6-bit weights |
| 554 | Hamming(7,4) encoder/decoder (IEEE) | Esaú Quispe Checca | Encodes a 4-bit word into a 7-bit Hamming(7,4) codeword, injects a single-bit error, then detects and corrects it — Equipo Triada CEG |
| 555 | Fixed-ROM XOR Stream Engine | Owen Deng | Ready/valid byte-stream XOR engine backed by a fixed 160-byte ROM |
| 577 | launch deployment timer | Eric Pearson | Accelerometer triggered timer with deployment sequencing |
| 579 | Simon Says memory game | Uri Shaked | Repeat the sequence of colors and sounds to win the game |
| 581 | Kinematic Wave Engine | Jeremie Willemin | 8-channel servo control for kinematic sculpture |
| 583 | project | Roaa_Ahmed | UART_TX |
| 585 | CRC-8 Serial LFSR | Mena Emil | 8-bit serial LFSR-based CRC generator/checker, seed 8'hD8, LSB-first data shift-in |
| 587 | TinyNPU4 | Essam Mohammed Elkholy | Host-controlled INT4 neural-network accelerator with two parallel MAC lanes |
| 608 | Highspeed voltage discriminator | Schwallsunk | Used as a digital front end for event counting |
| 609 | TinySoC | Maadesh | An 8-bit Harvard Architecture microcontroller with UART, GPIO, and PWM |
| 610 | 8-bit educational SAP-style CPU | University of La Frontera | A small 8-bit CPU (5 general-purpose registers, ALU, conditional jumps) with a shared bus and byte-programmable memory |
| 611 | Barrel Shifter | Mahmoud Magdy | Barrel Shifter handles 1 bit, 2 bit, and 4 bit shifts |
| 612 | BOOTCAMP | ELI | HATSUNE MIKU |
| 613 | Approximate DSP: Time-Multiplexed MAC Coprocessor | praneel | An 8-bit SPI-programmable approximate DSP block featuring a 4-tap time-multiplexed approximate MAC for Smart Dust Edge AI. |
| 614 | Tic Tac Toe | Hanz Baga and John Edward Macaraeg | An interactive 3×3 Tic-Tac-Toe game on VGA, showcasing real-time gameplay, cursor control, turn-based play, and automatic win detection. |
| 615 | Market-split oracle | joesagents | Checks candidate assignments for a fixed market-split instance |
| 616 | DVD player | Gian Mustar | dvd |
| 617 | Simple comparator + 2 DACs analog layout in a 1x1 tile | algofoogle (Anton Maurovic) | IHP sg13g2 custom layout analog experiments in a regular TT 1x1 digital tile |
| 618 | KATSEYE | CLEA | Kawaii symbol rain that reveals KATSEYE RULES in the center |
| 619 | 4x4NPU: Dual-Lane INT4 Neural Accelerator | Maadeshwar | Host-controlled IHP SG13G2 INT4 neural accelerator with two parallel MAC lanes, saturation, ReLU, and accumulator readback. |