
The Fixed-ROM XOR Stream Engine stores 160 fixed bytes in combinational
standard-cell ROM. After START, a host supplies one same-position input byte
at a time. The chip XORs that byte with the addressed ROM byte and returns the
result through a ready/valid output register.
This keeps the ASIC deliberately small: it stores only the fixed ROM and one output byte at a time. Input acquisition, formatting, and display are left to external hardware. The design targets one TTIHP26b tile.
This is a one-time-pad design, not authenticated encryption. The production key must be uniformly random, exactly the ciphertext length, kept private, and never reused. A wrong key still produces output; the chip cannot detect it.
The ROM contents are public. Any application that relies on one-time-pad confidentiality must keep its external key uniformly random, private, exactly the ROM length, and never reuse it.
The physical layout also includes a passive TopMetal1 artwork macro. It is electrically disconnected and does not affect the digital interface.
rst_n=0.uio_in[1] (START).uio_out[4] (KEY_READY) is high, place the next key byte on
ui_in[7:0] and pulse uio_in[0] (KEY_VALID).uio_in[2] (OUT_READY) high and capture uo_out[7:0] whenever
uio_out[6] (OUT_VALID) is high.uio_out[7] (DONE) stays high.uio_in[3] (ABORT) synchronously stops a session and clears progress.
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | KEY_DATA[0] | OUT_DATA[0] | KEY_VALID |
| 1 | KEY_DATA[1] | OUT_DATA[1] | START |
| 2 | KEY_DATA[2] | OUT_DATA[2] | OUT_READY |
| 3 | KEY_DATA[3] | OUT_DATA[3] | ABORT |
| 4 | KEY_DATA[4] | OUT_DATA[4] | KEY_READY |
| 5 | KEY_DATA[5] | OUT_DATA[5] | BUSY |
| 6 | KEY_DATA[6] | OUT_DATA[6] | OUT_VALID |
| 7 | KEY_DATA[7] | OUT_DATA[7] | DONE |