138 INTERCAL ALU

138 : INTERCAL ALU

Design render

How it works

As an educational project, it is inevitable that Tiny Tapeout would attract various pedagogical examples of common logic circuits, such as ALUs. While ALUs for common operations such as addition, subtraction, and binary bitwise logic are surprisingly common, it is much rarer to encounter one that can calculate the five operations of the INTERCAL programming language. Due to either the cost-prohibitive nature of Warmenhovian logic gates or general lack of interest, such a feat has never been performed until now. With chip production finally within reach of the average person, all it takes is one person who has more dollars than sense to design the fabled INTERCAL ALU (Arrhythmic Logic Unit).

The pin assignments for this design are roughly as follows. The /OE (output enable) and /WE (write enable) signals are active low, so should be set HIGH by default.

# Dedicated Input Dedicated Output Bidirectional I/O
0 A0 (address) D0 (output only) D0 (input and output only)
1 A1 (address) D1 (output only) D1 (input and output only)
2 S0 (selector) D2 (output only) D2 (input and output only)
3 S1 (selector) D3 (output only) D3 (input and output only)
4 S2 (selector) D4 (output only) D4 (input and output only)
5 S3 (selector) D5 (output only) D5 (input and output only)
6 /OE (output enable) D6 (output only) D6 (input and output only)
7 /WE (write enable) D7 (output only) D7 (input and output only)

This ALU has two 32-bit registers, B and A (in no particular order). (These may also be thought of as four 16-bit registers, AL, AH, BL, and BH.) To write a byte to a register, set A0 and A1 to the byte address, set S0 LOW for the A register or HIGH for the B register, set S1 through S3 LOW, set the bidirectional I/O pins to the byte value, set /WE LOW, then set /WE HIGH again. (Do not set S1 through S3 HIGH when writing, or else something unpredictable will happen, most likely nothing.)

To read a register or result, set A0 and A1 to the byte address, set S0 through S3 to the desired operation, set /OE LOW, read the byte value from the bidirectional I/O pins, then set /OE HIGH. Results can also be read from the dedicated outputs; the dedicated outputs are not affected by the /OE signal, as they do not need to care about your feelings.

The operations supported are listed below. An attempt was made to make it understandable.

Operations 0 and 1 simply return the current value of the A or B register, respectively. This corresponds with the values of S0 through S3 used in write mode. This is not unintentional. This might also explain why S1 through S3 must be LOW in write mode.

Operations 2 through 7 correspond to INTERCAL's unary AND, unary OR, and unary XOR operators, represented by ampersand (&), book (V), and what (?), respectively. From the INTERCAL manual:

<blockquote> These operators perform their respective logical operations on all pairs of adjacent bits, the result from the first and last bits going into the first bit of the result. The effect is that of rotating the operand one place to the right and ANDing, ORing, or XORing with its initial value. Thus, <code>#&77</code> (binary = 1001101) is binary 0000000000000100 = 4, <code>#V77</code> is binary 1000000001101111 = 32879, and <code>#?77</code> is binary 1000000001101011 = 32875. </blockquote>

Operations 2, 4, and 6 work on the 16-bit halves of the A register independently, while operations 3, 5, and 7 work on the 32-bit whole of the A register.

Operations 8 and 9 correspond to INTERCAL's interleave (also called mingle) operator, represented by big money ($). From the INTERCAL manual:

<blockquote> The interleave operator takes two 16-bit values and produces a 32-bit result by alternating the bits of the operands. Thus, <code>#65535$#0</code> has the 32-bit binary form 101010....10 or 2863311530 decimal, while <code>#0$#65535</code> = 0101....01 binary = 1431655765 decimal, and <code>#255$#255</code> is equivalent to <code>#65535</code>. </blockquote>

Operation 8 returns the interleave of the lower halves of A and B, while operation 9 returns the interleave of the upper halves of A and B. (Should the chip fabrication process allow for it, operation 8½ will, of course, return the interleave of the middle halves of A and B.)

Operations 10 and 11 correspond to INTERCAL's select operator, represented by sqiggle (~). From the INTERCAL manual:

<blockquote> The select operator takes from the first operand whichever bits correspond to 1's in the second operand, and packs these bits to the right in the result. Both operands are automatically padded on the left with zeros. […] For example, <code>#179~#201</code> (binary value 10110011~11001001) selects from the first argument the 8th, 7th, 4th, and 1st from last bits, namely, 1001, which = 9. But <code>#201~#179</code> selects from binary 11001001 the 8th, 6th, 5th, 2nd, and 1st from last bits, giving 10001 = 17. <code>#179~#179</code> has the value 31, while <code>#201~#201</code> has the value 15. </blockquote>

To help understand the select operator, the INTERCAL manual also provides a helpful circuitous diagram.

Use of operations 12 and above is not recommended, unless undefined behavior is required.

How to test

The following example calculations found in the INTERCAL manual should be particularly illuminating.

S A B F
MINGLE16L (8) 0 256 65536
MINGLE16L (8) 65535 0 2863311530
MINGLE16L (8) 0 65535 1431655765
MINGLE16L (8) 255 255 65535
SELECT16 (10) 51 21 5 *
SELECT16 (10) 179 201 9
SELECT16 (10) 201 179 17
SELECT16 (10) 179 179 31
SELECT16 (10) 201 201 15
AND16 (2) 77 4
OR16 (4) 77 32879
XOR16 (6) 77 32875

These test cases are included in the (unfortunately Python and not INTERCAL) test.py file. As these are likely more INTERCAL operations than any sensible person will ever perform, they should be sufficient for testing purposes. However, for curiosity's sake, an extensive set of additional test cases have also been included.

* Not found in the INTERCAL manual.

External hardware

The ALU may be used without external hardware, although seeing the output values may present a challenge. Instead, it is recommended to use a microcontroller of some sort to drive the inputs and read the outputs, as microcontrollers are designed to do. The implementation of the rest of the INTERCAL language is left as an exercise for the reader.

Further reading

The INTERCAL Programming Language Revised Reference Manual by Donald R. Woods and James M. Lyon with revisions by Louis Howell and Eric S. Raymond (can recommend highly enough)

IO

#InputOutputBidirectional
0A0 (address)D0D0
1A1 (address)D1D1
2S0 (selector)D2D2
3S1 (selector)D3D3
4S2 (selector)D4D4
5S3 (selector)D5D5
6/OE (output enable)D6D6
7/WE (write enable)D7D7

Chip location

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3.3v R2R DAC) tt_um_evm (Electronic Voting Machine) tt_um_top_axis_uart (AXIS_UART_TTO) tt_um_nco (Numerically Controlled Oscillator) tt_um_morse (Morse Code Converter) tt_um_tiny_hardware_authentication_engine (Tiny Hardware Authentication Engine) tt_um_mattvenn_analog_ring_osc (Ring Oscillators) tt_um_eestevez3_SAR_ADC (8 Bit SAR ADC) tt_um_wokwi_446992736864284673 (Binary Counter) tt_um_patrick_lin_git_mcht_trx (Manchester Encode/Decode with built-in 5X PLL) tt_um_bleeptrack_nn1 (Negative Nature #1) tt_um_bleeptrack_nn2 (Negative Nature #2) tt_um_bleeptrack_nn3 (Negative Nature #3) tt_um_bleeptrack_nn4 (Negative Nature #4) tt_um_underserved (TTSKY25b-RISCV-Core) tt_um_axc1271_tinypong (Tiny Pong) tt_um_Electom_cla_4bits (4-bit CLA) tt_um_zerotoasic_logo_screensaver (VGA Screensaver with Zero to ASIC Logo) tt_um_wokwi_446364830841352193 (Flip the Flop) tt_um_instrumented_ring_oscillator_two (instrumented_ring_oscillator_two) tt_um_tadc_its (Time Domain ADC) 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(JKU Matt Venn workshop simple project) tt_um_wokwi_442987801460891649 (Tiny Tapeout Template Copy) tt_um_rh_bf_top (TinyBF) tt_um_wokwi_442977585335625729 (WokWi Test) tt_um_wokwi_442977456053457921 (Wokwi Template) tt_um_wokwi_442979336364610561 (ShilpaTinytapeout) tt_um_kianv_rv32_regfile (KianV uLinux RISC-V regfile edition) tt_um_PWM (PWM_selector) tt_um_wokwi_445338187869298689 (WokwiPWM) tt_um_wokwi_447051835034957825 (TicTacToe) tt_um_chrimenz_tinyturing (Tiny Turing Machine) tt_um_emilian_opamp_3v3 (3V3 Opamp and DRAM cell) tt_um_jakedrew_qei (QEI (Quadrature Encoder Interface)) tt_um_wokwi_442977503814034433 (Tiny Tapeout Test Gates) tt_um_wokwi_442978871257096193 (fdfs) tt_um_wokwi_445163636148924417 (not a dumpster fire ) tt_um_wokwi_445175272109059073 (Tiny Takeout Test Gates) tt_um_wokwi_445163800203964417 (Four-bit adder tiny tapeout) tt_um_wokwi_445163606906219521 (Secret Password) tt_um_wokwi_445172222101072897 (Tiny Tapeout Template Project) tt_um_wokwi_445163763917969409 (Tiny Tapeout Binary to 7SD) tt_um_wokwi_445172941748296705 (Anushka and Tina Wokwi) tt_um_wokwi_445163964149915649 (Tahmid and Sunny's First Wokwi Design) tt_um_verilog_meetup_template_project_example (Verilog Meetup Template Project Example) tt_um_brainfck_asic (Brainf*ck ASIC) tt_um_wokwi_446363834407809025 (RHYTHM LOOPER and RANDOMIZER 9000) tt_um_technology_characterization (SKY130 technology characterization) tt_um_mosbius (mini mosbius) tt_um_bouncing_squares (Bouncing squares) tt_um_PseudoSM_ASIC (PSM_asic) tt_um_enjimneering_tts_top (TinyTapeStation) tt_um_morse_it (MORSEASCII) tt_um_vga_projekt_ed_nkpng (vga_projekt_ed_nkpng) tt_um_uart_temp_sens (Uart and Temperature sensor) tt_um_ragnar_lucasnilsson954 (RagnarMegaRaknare) tt_um_react_test_saksh156 (React Chip) tt_um_mastermind (Mastermind) tt_um_synth_magmusson (hardcoded sequencer) tt_um_hammal_fir_filter (FIR Filter) tt_um_tinytone (tt-tinytone) tt_um_julke_gussinatorn2 (JulkeGussinatorn 2.0) tt_um_se_opamps (ttsky25_se_opamps) tt_um_unclegravity_7seg_counter (7-Segment Counter) tt_um_wokwi_445256658591419393 (Andrew chip design) tt_um_counter_isaharp (Counter) tt_um_wokwi_445254959452357633 (Anton's-Hardware-Hack) tt_um_wokwi_445256643197274113 (SignalSorter) tt_um_wokwi_445265826672030721 (The Adder) tt_um_wokwi_445175605912766465 (Tiny Tapeout Hradware Workshop Vaibhav) tt_um_fkd_xorshift (xorshift) tt_um_wokwi_445255035084055553 (Tiny Tapeouts Chip Design) tt_um_wokwi_445254913718704129 (Tiny Tapeout Test Gates) tt_um_wokwi_445254916601240577 (cirucuit) tt_um_wokwi_442988784492711937 (test) tt_um_rejunity_ym2413_ika_opll (YM2413 FM synthesis audio chip) tt_um_top_general (Dual-Channel PWM with SPI Control + Extra Test Logic) tt_um_proppy_megabytebeat (megabytebeat) tt_um_rom_vga_screensaver (VGA Screensaver with embedded bitmap ROM) tt_um_sky25a_nurirfansyah_nauta (Nauta OTA with digital trimming) tt_um_mattvenn_relax_osc (Relaxation oscillator) tt_um_pantelis300_nco (NCO) tt_um_ieeeuoftasic_simproc (SimProc (Simple Processor)) tt_um_rejunity_vga_playground (My (S)VGA Playground) tt_um_Onchip_VCOx2 (Onchip - Ring VCO 11 stages x2) tt_um_dlmiles_dffram32x8_2r1w (Tiny RAM DFF 2r1w) tt_um_Onchip_BandGap (OnChip - Bandgap Reference) tt_um_kianv_bare_metal (KianV RISC-V RV32E Baremetal SoC) tt_um_pommarkus_i2c_slave (I2C Slave) tt_um_MichaelBell_tinyQV (TinyQV Risc-V SoC) tt_um_reservoir (EZ Reservoir) tt_um_morse_w_serial (Morse Code Detector (With Serial RX)) tt_um_dyno (dyno-tt) tt_um_libokuohai_asap_cpu_v1 (ASAP CPU v1) tt_um_2048_vga_game (2048 sliding tile puzzle game (VGA)) tt_um_quick_cpu (4 hour CPU) tt_um_tv_b_gone_rom (TV-B-Gone-EU (ROM Macro variant)) tt_um_flappy_vga_cutout1 (Flappy VGA) tt_um_Sai222777 (XOR Stream Cipher) tt_um_ring_osc3 (Verilog Multistage Oscillator with Enable and Counter) Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available