782 PSM_asic
782 : PSM_asic
- Author: Cristian Valenti
- Description: It is the implementation of a reduced softmax function for neural networks
- GitHub repository
- Open in 3D viewer
- Clock: 40000000 Hz
How it works
My project is an 8-bit Pseudo SoftMax accelerators for neural networks. It is basically an activation function at the end of the network that ouputs the results of the computation.
How to test
A behavioural test of the softmax is complex as it's tipical inputs are output of plenty of layers of neurons. Since this particular design has been ripped off from an actually working network, we are pretty sure of its beahviour. The way we tested out is more related to our concerns about the physical implementation of the chip. So what we did was take our Openlane output (nl.v) and provide random inputs to both the netlist and the verilog design and compare it.
This methodology will be implemented on this reporitory in a further release.
External hardware
Since it is an hardware accelerator it doesn't need any
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | Data_in[0] | Data_out[0] | Sel_out[0] |
| 1 | Data_in[1] | Data_out[1] | Sel_out[1] |
| 2 | Data_in[2] | Data_out[2] | Sel_out[2] |
| 3 | Data_in[3] | Data_out[3] | Sel_out[3] |
| 4 | Data_in[4] | Data_out[4] | Sel_in[0] |
| 5 | Data_in[5] | Data_out[5] | Sel_in[1] |
| 6 | Data_in[6] | Data_out[6] | Sel_in[2] |
| 7 | Data_in[7] | Data_out[7] | Sel_in[3] |