
inputs 0 and 1 are connected to the first and gate going to output 0. inputs 2 and 3 are connected to the second and gate going to output 1. inputs 4 and 5 are connected to the first nand gate going to output 2. inputs 6 and 7 are connected to the second nand gate going to output 3.
| Input A | Input B | AND Output | NAND Output |
|---|---|---|---|
| 0 | 0 | 0 | 1 |
| 0 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 0 |
none
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | input a | output and 1 | |
| 1 | input b | output and 2 | |
| 2 | input c | output nand 1 | |
| 3 | input d | output nand 2 | |
| 4 | input e | ||
| 5 | input f | ||
| 6 | input g | ||
| 7 | input h |