942 sky130_as_sc_hs dyn test
942 : sky130_as_sc_hs dyn test
- Author: Tholin
- Description: Testing sky130_as_sc_hs SCL with dynamic DFFs
- GitHub repository
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- Clock: 10000000 Hz
How it works
Contains a LFSR that updates on every clock cycle and outputs on all output pins. It uses dynamic DFFs, which means they will loose their state if the clock speed gets too low.
How to test
Release from reset with all ui_in pins zero.
External hardware
RP2040 or LEDs to see the output state.
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | init[0] | lfsr[0] | lfsr[8] |
| 1 | init[1] | lfsr[1] | lfsr[9] |
| 2 | init[2] | lfsr[2] | lfsr[10] |
| 3 | init[3] | lfsr[3] | lfsr[11] |
| 4 | init[4] | lfsr[4] | lfsr[12] |
| 5 | init[5] | lfsr[5] | lfsr[13] |
| 6 | init[6] | lfsr[6] | lfsr[14] |
| 7 | init[7] | lfsr[7] | lfsr[15] |