813 ABC Temporal Coincidence Detector
813 : ABC Temporal Coincidence Detector
- Author: Jonny Edwards
- Description: Single-bit temporal coincidence detector: outputs pulse each clock cycle indicating whether only X1, only X2, or both inputs are high.
- GitHub repository
- Open in 3D viewer
- Clock: 50000000 Hz
How it works
The ABC module is a temporal coincidence detector. On each rising clock edge (while ena is high) it samples two single-bit inputs — X1 (ui[0]) and X2 (ui[1]) — and classifies their relationship:
| X1 | X2 | A | B | C1 | C2 |
|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 | 0 | 0 |
| 1 | 0 | 0 | 1 | 0 | 0 |
| 1 | 1 | 0 | 0 | 1 | 1 |
- A (
uo[0]): pulses high when only X2 is high - B (
uo[1]): pulses high when only X1 is high - C1 (
uo[2]) and C2 (uo[3]): both pulse high when X1 and X2 are simultaneously high (coincidence)
All outputs are registered and update one clock cycle after the inputs are sampled. When rst_n is asserted low, all outputs are immediately cleared to zero. When ena is deasserted the outputs hold their last value.
How to test
- Assert reset (
rst_nlow) for at least one clock cycle — all outputs should read0x00. - Release reset and assert
ena. - Drive
ui[0](X1) andui[1](X2) with the combinations in the truth table above and verify the corresponding outputs one clock cycle later. - Check that
uo[7:4]is always0. - Deassert
enawhile changing inputs — outputs should hold their previous values.
External hardware
None required.
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | X1 | A (only X2 high) | |
| 1 | X2 | B (only X1 high) | |
| 2 | C1 (both X1 and X2 high) | ||
| 3 | C2 (both X1 and X2 high) | ||
| 4 | |||
| 5 | |||
| 6 | |||
| 7 |