906 Zenith TX26
906 : Zenith TX26
- Author: Doruk Orak
- Description: A 16-bit CPU designed from scratch in Verilog. Runs Fibonacci sequence.
- GitHub repository
- Open in 3D viewer
- Clock: 27000000 Hz
Zenith TX26 — 16-bit CPU
A 16-bit CPU designed from scratch in Verilog by Doruk Orak, age 16, Istanbul.
How it works
The Zenith TX26 is a fully custom 16-bit CPU with:
- 8 registers (R0-R7, R0 hardwired to 0)
- 16 instructions (ADD, SUB, AND, OR, XOR, SHL, SHR, SLT, LDI, ADDI, LD, ST, JMP, BEQ, BLT, NOP)
- Harvard architecture (separate instruction and data memory)
- Runs infinite Fibonacci sequence on output pins
How to test
Connect 8 LEDs to the output pins. The LEDs will display the current Fibonacci number in binary: 1, 1, 2, 3, 5, 8, 13, 21...
External hardware
8 LEDs connected to the output pins to display Fibonacci numbers in binary (optional).
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | R1 bit 0 (Fibonacci output) | ||
| 1 | R1 bit 1 | ||
| 2 | R1 bit 2 | ||
| 3 | R1 bit 3 | ||
| 4 | R1 bit 4 | ||
| 5 | R1 bit 5 | ||
| 6 | R1 bit 6 | ||
| 7 | R1 bit 7 |