
AND,NAND and OR gates are connected to input a and b
16 flip flops are used to divide the clock speed woth 2 outputs, one at the 12h flop and one at the 16th.
Set the inputs and check the outputs match with the expected results: | input a and b | output AND | output NAND | output OR | | --------------------------------------------------------| | 0 0 | 0 | 1 | 0 | | 0 1 | 0 | 1 | 1 | | 1 0 | 0 | 1 | 1 | | 1 1 | 1 | 0 | 1 |
Set the clock to 10kHz and you should see the 5th output flashing quickly and the 4th output flashing slowly.
7seg display
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | input a | output and | |
| 1 | input b | output nand | |
| 2 | output or | ||
| 3 | output clock div 16 | ||
| 4 | output clock div 12 | ||
| 5 | |||
| 6 | |||
| 7 |