1005 Fibonacci Counter
1005 : Fibonacci Counter
- Author: João Bortolace
- Description: 16-bit Fibonacci counter with BCD converter and multiplexed driver for 5 displays.
- GitHub repository
- Open in 3D viewer
- Clock: 1000 Hz
Fibonacci 7-Segment Display Controller
A 16-bit Fibonacci sequence generator with a Binary-to-BCD converter and a multiplexed 5-digit 7-segment display driver.
How it works
This design calculates the Fibonacci sequence up to 16 bits (max value 46,368 before overflow). The process is divided into four main stages:
- Fibonacci Core: A synchronous counter that calculates the next number in the sequence (
n = n-1 + n-2) whenever an external pulse is detected. - Binary-to-BCD (Double Dabble): Since 7-segment displays require decimal digits, a Double Dabble algorithm converts the 16-bit binary value into five 4-bit BCD (Binary Coded Decimal) nibbles. This conversion takes exactly 17 clock cycles.
- Multiplexer: A Ring Counter rotates a "one-hot" bit to enable one of the 5 digits at a time, synchronized with the main clock.
- 7-Segment Decoder: A combinational block that converts the current BCD nibble into the standard
gfedcbapattern for the display.
The design includes a synchronizer and edge detector on the manual step input to ensure stable operation even with mechanical buttons.
How to test
- Clock: Provide a slow clock (around 1kHz) to the
clkpin. This ensures a flicker-free multiplexing frequency of 200Hz per digit. - Reset: Apply a low pulse to
rst_nto initialize the sequence to 0. - Manual Step: Pulse the
ui_in[0]pin to calculate and display the next Fibonacci number. - Observation:
uo_out[6:0]will show the segments (active high).uo_out[7](Ready Flag) will blink low during the 17ms conversion time.uio_out[4:0]will scan through the 5 digit enables.
External hardware
To fully interact with this design, you will need the following component:
- 7-Segment Display (5 Digits):
- Type: Common Cathode.
- Multiplexing: The display must have shared segment pins (a-g) and individual Digit Enable pins (Anodes/Cathodes). Each pin should have a current limiting resistor.
- Transistor Driver: A transistor must be used on the common cathode pin of each display to enable it to be turned on and off.
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | advance | seg_a | digit_en_0 |
| 1 | seg_b | digit_en_1 | |
| 2 | seg_c | digit_en_2 | |
| 3 | seg_d | digit_en_3 | |
| 4 | seg_e | digit_en_4 | |
| 5 | seg_f | digit_en_5 | |
| 6 | seg_g | none | |
| 7 | bcd_ready | none |