518 PQC NTT Butterfly Core
518 : PQC NTT Butterfly Core
- Author: Aishwarya Gadela & Bojji Reddy Rishika
- Description: Hardware-accelerated Cooley-Tukey NTT Butterfly processing block for PQC Kyber
- GitHub repository
- Open in 3D viewer
- Clock: 10000000 Hz
How it works
This project implements a hardware-accelerated Cooley-Tukey Number Theoretic Transform (NTT) Butterfly Core optimized for CRYSTALS-Kyber post-quantum cryptography ($q = 3329$). It performs fast modular addition and subtraction arithmetic arrays using specialized combinational subtraction matrix logic blocks without slow division operations.
How to test
Provide input arrays for $A_in$ on the primary input bus, and seed values for $B_in$ and twiddle factors $W_in$ on the split bidirectional bus lines. Drive clock transitions to observe calculated modular transformation bounds on $X_out$ and $Y_out$.
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | A_in[0] | X_out[0] | B_in[0] |
| 1 | A_in[1] | X_out[1] | B_in[1] |
| 2 | A_in[2] | X_out[2] | B_in[2] |
| 3 | A_in[3] | X_out[3] | B_in[3] |
| 4 | A_in[4] | X_out[4] | Y_out[4] |
| 5 | A_in[5] | X_out[5] | Y_out[5] |
| 6 | A_in[6] | X_out[6] | Y_out[6] |
| 7 | A_in[7] | X_out[7] | Y_out[7] |