547 Tiny RIng Oscillator PUF :: Quicker, easier and cheaper to make your own chip!

How it works

This project implements a Programmable Length Ring Oscillator designed as a Physical Unclonable Function (PUF) for hardware security applications. The core architecture consists of an inverter chain whose effective delay path can be dynamically configured using digital selection signals.

By manipulating the multiplexer controls, the user can select different feedback loops and vary the number of active inverting stages. Due to sub-nanosecond propagation delays and microscopic process variations unique to each die during the GlobalFoundries 180nm (gf180mcu) manufacturing process, the circuit oscillates at a unique, device-specific frequency for each challenge combination. This chaotic asynchronism acts as a silicon fingerprint.

An integrated control path monitors the state of the circuit, sample capture events, and triggers a telemetry transmission when the output is ready.

Top-Level Port Mapping (Tiny Tapeout Template Integration)

The hardware signals have been packed and mapped into the standard Tiny Tapeout 8-bit buses as follows:

Dedicated Inputs (`ui_in`)

Bit	Signal Name	Type	Description
[1:0]	`sel_mux_0`	Input	Multiplexer 0 selection lines (Challenge bits 0-1)
[3:2]	`sel_mux_1`	Input	Multiplexer 1 selection lines (Challenge bits 2-3)
[6:4]	`n_inv`	Input	Number of active inverter stages selection (Challenge bits 4-6)
[7]	`enable`	Input	Ring Oscillator hardware enable (1 = Run, 0 = Standby/Gated)

Bidirectional Controls (`uio_in` / `uio_out`)

Note: Configured as inputs for control handshake.

Bit	Signal Name	Type	Description
[0]	`tx_ready`	Input	Handshake signal indicating receiver is ready for data
[1]	`op_mode`	Input	Operation Mode configuration bit
[7:2]	Unused	Input	Reserved (Driven to 0)

Dedicated Outputs (`uo_out`)

The output ports stream out the digitized frequency signatures or telemetry data generated by the PUF core.

How to test

To prevent excessive power consumption and thermal saturation, the Ring Oscillator features a gated input. Follow these sequential steps to test the project behavior:

System Reset: Drive rst_n LOW for at least 10 clock cycles while keeping ui_in and uio_in at 0. Then release the reset by driving rst_n HIGH.
Challenge Selection: Provide the desired delay path configuration by assigning values to sel_mux_0, sel_mux_1, and n_inv using the lower 7 bits of ui_in.
Core Activation: Drive ui_in[7] (enable) HIGH. The Ring Oscillator will immediately start oscillating at its native physical frequency.
Data Acquisition: Set uio_in[0] (tx_ready) HIGH to enable the internal transmission logic. Observe the output data streams or frequency signatures on the dedicated output pins (uo_out).
Safe Standby: Once data collection is completed, immediately drive ui_in[7] (enable) back to 0 to gate the oscillator loop and release system resources.

External hardware

No external hardware is strictly required for basic evaluation, as the digital control buses can be fully driven using Tiny Tapeout's standard digital input switches.

However, for high-precision validation:

An Oscilloscope or Logic Analyzer can be connected to the dedicated output pins (uo_out) to measure raw digital jitter or frequency deviations.
A Microcontroller or FPGA board (via PMOD) can be attached to automate challenge injection loops (ui_in) and analyze the uniqueness and reliability metrics of the PUF responses.

#	Input	Output	Bidirectional
0	sel_mux_0[0]	debug_ro[0]	tx_ready
1	sel_mux_0[1]	debug_ro[1]	op_mode
2	sel_mux_1[0]	debug_ro[2]
3	sel_mux_1[1]	debug_ro[3]
4	n_inv[0]	valid_out[0]
5	n_inv[1]	valid_out[1]
6	n_inv[2]	cnt_data_out[0]	debug_done_out[0]
7	puf_enable	cnt_data_out[1]	debug_done_out[1]

547 Tiny RIng Oscillator PUF