714 SEQ_MAC_INF_16H3 - Neural Network Inference Accelerator :: Quicker, easier and cheaper to make your own chip!

714 : SEQ_MAC_INF_16H3 - Neural Network Inference Accelerator

Author: Neuromurf

Description: 8-bit sequential MAC with autonomous MNIST inference

Clock: 50000000 Hz

How it works

This project is a sequential AI accelerator designed for on-chip full connected neural network inference of MNIST dataset. The design architecutre consists of three main mdoules: top-level wrapper, 11-state control FSM and arithmetic datapath module.

How to test

Interface with MCU (e.g., TT on-board RP2040/RP2350 MCU), assert 'rst_n' LOW, start MAC, send data (either weights or test values) through ui_in pins (controll data type throuhg 'data_type' and 'data_toggle' pins) and 10 class classification result at output pin in 4-bit format.

External hardware

RP2040/RP2350 or any other MCU for feed pre-trained weights and inputs to the ASIC. For example, using TinyTapeout demo board for convenient interfacing.

#	Input	Output	Bidirectional
0	data_in[0]	result[0] / busy	data_toggle
1	data_in[1]	result[1] / done	data_type
2	data_in[2]	result[2] / ready	start
3	data_in[3]	result[3] / byte_valid	mode[0]
4	data_in[4]	best_class[0] / inf_done	next_byte
5	data_in[5]	best_class[1] / layer	soft_rst
6	data_in[6]	best_class[2] / err_flag	mode[1]
7	data_in[7]	best_class[3] / reserved	status_sel

Input

Output

Bidirectional

data_in[0]

result[0] / busy

data_toggle

data_in[1]

result[1] / done

data_type

data_in[2]

result[2] / ready

start

data_in[3]

result[3] / byte_valid

mode[0]

data_in[4]

best_class[0] / inf_done

next_byte

data_in[5]

best_class[1] / layer

soft_rst

data_in[6]

best_class[2] / err_flag

mode[1]

data_in[7]

best_class[3] / reserved

status_sel

Chip location

714 SEQ_MAC_INF_16H3 - Neural Network Inference Accelerator