
Input 1-bit PDM signal from an external discrete 2nd-order Delta-Sigma Modulator. This ASIC implements a 3rd-order CIC filter (Decimation Ratio = 32) to demodulate the PDM signal into 8-bit PCM audio data. The design focuses on Hardware-in-the-Loop verification between a custom PCB and the ASIC.
ui_in[0].uo_out[7:0] with a Logic Analyzer. The reconstructed waveform should match the input sine wave.| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | PDM Input (d_in) | PCM Output Bit 7 (MSB) | NC |
| 1 | NC | PCM Output Bit 6 | NC |
| 2 | NC | PCM Output Bit 5 | NC |
| 3 | NC | PCM Output Bit 4 | NC |
| 4 | NC | PCM Output Bit 3 | NC |
| 5 | NC | PCM Output Bit 2 | NC |
| 6 | NC | PCM Output Bit 1 | NC |
| 7 | NC | PCM Output Bit 0 (LSB) | NC |