Tiny Tapeout > Tiny Tapeout Chips > Tiny Tapeout IHP 26a > 206 TinyMOA: RISC-V CPU with Compute-in-Memory Accelerator
206 TinyMOA: RISC-V CPU with Compute-in-Memory Accelerator
206 : TinyMOA: RISC-V CPU with Compute-in-Memory Accelerator
- Author: Ezra Wolf
- Description: RISC-V CPU based on TinyQV with an integrated SRAM-based compute-in-memory (CIM) accelerator for performing efficient analog matrix multiplications.
- GitHub repository
- Open in 3D viewer
- Clock: 50000000 Hz
How it works
WIP
How to test
WIP
External hardware
List external hardware used in your project (e.g. PMOD, LED display, etc), if any WIP
Setup
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Download VSCode or alternative code editor
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Create the IHP26a implementation through the template here https://github.com/TinyTapeout/ttihp-verilog-template
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Create the main TinyDCIM repo
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Setup code skeletons & link main repo to the IHP26a repo through submodule
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Get dummy counter sanity test working with GDS and submit through TT site
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Download KLayout
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Download IHP PDK https://github.com/IHP-GmbH/IHP-Open-PDK
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Copy right files (?) to KLayout
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | enable | dbg_pc[0] | |
| 1 | up_down | dbg_pc[1] | |
| 2 | clk | dbg_pc[2] | |
| 3 | dbg_pc[3] | ||
| 4 | dbg_pc[4] | ||
| 5 | dbg_state[0] | ||
| 6 | dbg_state[1] | ||
| 7 | dbg_state[2] |