902 Baby CPU
902 : Baby CPU
- Author: Ripunjay Singh, Alok Kumar Kamal
- Description: A small 8-bit CPU with 16-byte ROM/RAM and simple accumulator architecture
- GitHub repository
- Open in 3D viewer
- Clock: 100000000 Hz
How it works
This project implements a TinyTapeout-friendly minimal 8-bit CPU with a compact accumulator-based architecture.
The processor contains:
- An 8-bit accumulator register
- A 4-bit program counter
- 16 × 8-bit program ROM
- 16 × 8-bit data RAM
The CPU executes one instruction per clock cycle. Each instruction is 8 bits wide and follows the format:
- Upper 4 bits: Opcode
- Lower 4 bits: Operand / address
Supported instructions include:
- Arithmetic: ADD, SUB
- Logic: AND, OR, XOR
- Memory operations: LD, ST
- Branching: JMP, JZ, JN
- I/O operations: INP, INIO, OUT, OUTIO
The default ROM program continuously:
- Reads the external input pins (
ui_in) - Stores the value in the accumulator
- Sends the value to output pins (
uo_out) - Pulses the value onto bidirectional I/O pins (
uio_out) - Repeats forever using a jump instruction
This demonstrates basic instruction execution, program flow, and I/O interfacing in a very small silicon footprint suitable for a single TinyTapeout tile.
How to test
- Apply a clock signal to the design.
- Keep
enahigh to allow CPU execution. - Assert
rst_n = 0briefly to reset the CPU. - Release reset by setting
rst_n = 1.
Testing behavior:
- Apply any 8-bit value on
ui_in[7:0] - The CPU reads this value using the
INPinstruction - The value appears on:
uo_out[7:0]uio_out[7:0]for one clock cycle
Example:
- If
ui_in = 8'b10101010 - Then
uo_outwill become10101010
The program continuously loops, so changing ui_in dynamically updates the outputs.
External hardware
No external hardware is required.
Optional external hardware for demonstration:
- DIP switches or buttons connected to
ui_in - LEDs connected to
uo_out - Logic analyzer for observing instruction execution and I/O activity
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | External input bit 0 | CPU output bit 0 | Bidirectional IO bit 0 |
| 1 | External input bit 1 | CPU output bit 1 | Bidirectional IO bit 1 |
| 2 | External input bit 2 | CPU output bit 2 | Bidirectional IO bit 2 |
| 3 | External input bit 3 | CPU output bit 3 | Bidirectional IO bit 3 |
| 4 | External input bit 4 | CPU output bit 4 | Bidirectional IO bit 4 |
| 5 | External input bit 5 | CPU output bit 5 | Bidirectional IO bit 5 |
| 6 | External input bit 6 | CPU output bit 6 | Bidirectional IO bit 6 |
| 7 | External input bit 7 | CPU output bit 7 | Bidirectional IO bit 7 |