290 AXI4-Lite Slave Register Demo
290 : AXI4-Lite Slave Register Demo
- Author: jenny82121027
- Description: Tiny Tapeout AXI4-Lite slave wrapper with a read-only ID register, 32 registers, and a 16-bit readback path on the bidirectional pins.
- GitHub repository
- Open in 3D viewer
- Clock: 50000000 Hz
AXI4-Lite Slave Tiny Tapeout Project
This design wraps a simple AXI4-Lite slave in a Tiny Tapeout-compatible top module.
Behavior
ui_in[4:0]selects the register addressui_in[5]starts a write transactionui_in[6]starts a read transactionui_in[7]acts asBREADYuio_in[7:0]carries write datauo_out[7:0]anduio_out[7:0]return the 16-bit read datauio_oeenables the bidirectional pins only while driving read data
Register Map
- 32 registers are implemented
- Address
1is a read-only ID register with the value0x00018644 - Writes use byte strobes inside the AXI4-Lite slave
Top Module
tt_um_jenny82121027_axi4lite
Design Files
src/tt_um_jenny82121027_axi4lite.svsrc/axi4_lite_slave.sv
Verification
- Cocotb regression runs under
test/ - Verilator assertions are enabled in the slave RTL
- The GitHub Actions GDS flow passed for the current submission-ready version
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | reg_addr[0] | rdata[0] | wdata[0] / rdata[8] |
| 1 | reg_addr[1] | rdata[1] | wdata[1] / rdata[9] |
| 2 | reg_addr[2] | rdata[2] | wdata[2] / rdata[10] |
| 3 | reg_addr[3] | rdata[3] | wdata[3] / rdata[11] |
| 4 | reg_addr[4] | rdata[4] | wdata[4] / rdata[12] |
| 5 | write_req | rdata[5] | wdata[5] / rdata[13] |
| 6 | read_req | rdata[6] | wdata[6] / rdata[14] |
| 7 | S_BREADY | rdata[7] | wdata[7] / rdata[15] |