808 4x4 Array Multiplier with VGA Visualization
808 : 4x4 Array Multiplier with VGA Visualization
- Author: Carlos Acevedo, Brock Fuller, Akshat Verma, Vance Vojslavek, Hira Memon, Ezenwa Opara, Erik Rodriguez, Samiya Qasmi, Sahil Najmal, Matthew Hodges
- Description: A structural 4×4 array multiplier using 12 full adders that displays the input operands and the resulting 8-bit product as a decimal equation on a 640×480 VGA monitor through the Tiny VGA PMOD. The designers’ initials and the Purdue Fort Wayne mascot, the mastodon, are also shown on the display. Inputs are provided through bare solder pads for direct cable connections.
- GitHub repository
- Open in 3D viewer
- Open in VGA Playground
- Clock: 25000000 Hz
How it works
This project implements a 4x4 structural array multiplier that multiplies two 4-bit unsigned integers (A and B) to produce an 8-bit product (P = A × B), and displays the decimal equation on a VGA monitor via the Tiny VGA PMOD.
Input Pins
The 8 input pins (ui_in[7:0]) are bare footprint pads designed for direct cable soldering:
ui_in[3:0]= multiplicand A (values 0–15)ui_in[7:4]= multiplier B (values 0–15)
Solder wires from your external digital signal source directly onto the input pads on the TinyTapeout carrier board.
Array Multiplier
The multiplication is performed using a classic array of 12 full adders arranged in a carry-propagate tree:
- Partial products are formed by ANDing each bit of A with each bit of B.
- The partial products are summed column-by-column using full adders.
- The result is fully combinational (no lookup tables, no DSP blocks).
Inputs are registered on the rising edge of the 25 MHz clock for glitch-free operation.
VGA Output
A 640×480 @ 60 Hz VGA signal is generated by the hvsync_generator module, which requires a 25 MHz clock. The Tiny VGA PMOD must be connected to uo_out.
The screen displays the multiplication equation in large coloured decimal digits, centred inside a bordered panel:
A x B = P
- A is shown in red
- B is shown in blue
- P (product) is shown in green
- Operators (×, =) are shown in white
Leading zeros are suppressed for clean readability (e.g. 3 x 7 = 21, not 03 x 07 = 021).
Below the equation panel, seven horizontal colored bands are drawn as a decorative strip that visually represents the structure of the array multiplier. Each band has a distinct color (cyan, blue, magenta, lavender, light green, light cyan, white) to evoke the layered partial-product rows of the multiplication tree.
Below that, the designers’and workshop organizers' initials and the Purdue Fort Wayne mascot, the mastodon, are also shown on the display.
Use
- Connect the Tiny VGA PMOD to the
uo_outheader. - Solder wires to the
ui_in[0]–ui_in[7]footprint pads on the board. - Connect
ui_in[3:0]to a 4-bit digital source for operand A. - Connect
ui_in[7:4]to a 4-bit digital source for operand B. - Apply a 25 MHz clock.
- The VGA monitor will display the equation with the current decimal values.
- Change the input signals to see the multiplication update in real time.
Data source
- Tiny VGA PMOD plugged into
uo_out. - External digital signal source (e.g. FPGA, microcontroller, logic board) connected via soldered wires to the
ui_inpads.
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | A[0] multiplicand bit 0 (solder pad) | R1 (VGA red bit 1) | (unused) |
| 1 | A[1] multiplicand bit 1 (solder pad) | G1 (VGA green bit 1) | (unused) |
| 2 | A[2] multiplicand bit 2 (solder pad) | B1 (VGA blue bit 1) | (unused) |
| 3 | A[3] multiplicand bit 3 (solder pad) | vsync | (unused) |
| 4 | B[0] multiplier bit 0 (solder pad) | R0 (VGA red bit 0) | (unused) |
| 5 | B[1] multiplier bit 1 (solder pad) | G0 (VGA green bit 0) | (unused) |
| 6 | B[2] multiplier bit 2 (solder pad) | B0 (VGA blue bit 0) | (unused) |
| 7 | B[3] multiplier bit 3 (solder pad) | hsync | (unused) |