748 ShilpaTinytapeout
748 : ShilpaTinytapeout
- Author: ShilpaShyam
- Description: Test some logic gates and a clock divider
- GitHub repository
- Open in 3D viewer
- View in Wokwi
- Clock: 10000 Hz
How it works
AND, NAND and OR GATES are connected to the input a and b
16 flip flops are used to divide the clock speed with 2 outputs one at the 12th flip flop and one at the 16th
How to test
Set the inputs and check the outputs match with the expected results
External hardware
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | input a | output 0 | |
| 1 | input b | output 1 | |
| 2 | output 2 | ||
| 3 | output 3 | ||
| 4 | output 4 | ||
| 5 | output 5 | ||
| 6 | output 6 | ||
| 7 | output 7 |