
This project implements a 3-bit magnitude comparator that takes two 3-bit unsigned integers A and B as inputs and compares them, displaying the result on a 7-segment display.
The circuit first computes the XOR of each corresponding bit pair (A2/B2, A1/B1, A0/B0) to detect differences between the two numbers. These difference signals are then fed into a chain of AND and NOT gates to determine the most significant bit position where A and B differ, which determines the result. Three comparison outputs are derived:
The three comparison results are encoded and routed to the 7-segment display outputs (seg_a through seg_g) to visually indicate the result — displaying a distinct symbol for greater than, equal to, or less than.
| A (ui[2:0]) | B (ui[5:3]) | Expected Display |
|---|---|---|
| 000 (0) | 000 (0) | = (equal) |
| 101 (5) | 011 (3) | > (greater than) |
| 010 (2) | 110 (6) | < (less than) |
| 111 (7) | 111 (7) | = (equal) |
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | A0 | seg_a | |
| 1 | A1 | seg_b | |
| 2 | A2 | seg_c | |
| 3 | B0 | seg_d | |
| 4 | B1 | seg_e | |
| 5 | B2 | seg_f | |
| 6 | seg_g | ||
| 7 | seg_dp |