This project implements a 3-stage current-starved ring VCO designed in the SkyWater Sky130 130nm open-source PDK. The oscillator core uses PMOS current-source loads and NMOS tail-current sources controlled by a single control voltage (Vctrl). By varying Vctrl, the current through each delay stage is starved or boosted, directly tuning the oscillation frequency. A two-stage CMOS output buffer ensures rail-to-rail swing and isolates the oscillator core from external capacitive loading. The VCO achieves a tuning range of approximately 5.27 MHz to 57.57 MHz across Vctrl = 0.7V to 1.7V.
No external hardware required. The design is a standalone analog VCO core intended for pre-layout simulation using Xschem + ngspice with the Sky130 PDK. No PMOD or external display interfaces are used.
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | VCO Frequency output | ||
| 1 | |||
| 2 | |||
| 3 | |||
| 4 | |||
| 5 | |||
| 6 | |||
| 7 |
ua | PCB Pin | Internal index | Description |
|---|---|---|---|
| 0 | B0 | 6 | Shared Control/Bias |
| 1 | B1 | 7 | Diff-Amp In+ |
| 2 | B3 | 9 | Diff-Amp In- |
| 3 | B2 | 8 | Diff-Amp Out |