514 Tiny RISC-V
514 : Tiny RISC-V
- Author: CIT
- Description: Minimal RV32I-like core for TinyTapeout
- GitHub repository
- Open in 3D viewer
- Clock: 50000000 Hz
Tiny RISC-V (2x2) Ultra-small RISC-V-like core optimized to fit a single TinyTapeout tile.
Summary Single-cycle, RV-like instruction subset: ADDI, ADD, SUB, BEQ, LUI. 8 registers (r0..r7), r0 is zero. 16-word ROM containing a demo loop that increments r1. GPIO in (ui_in[7:0]) and GPIO out (uo_out[7:0]). NOT a full RV32I implementation: simplified to reduce area.
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | gpio_in_0 | gpio_out_0 | |
| 1 | gpio_in_1 | gpio_out_1 | |
| 2 | gpio_in_2 | gpio_out_2 | |
| 3 | gpio_in_3 | gpio_out_3 | |
| 4 | gpio_in_4 | gpio_out_4 | |
| 5 | gpio_in_5 | gpio_out_5 | |
| 6 | gpio_in_6 | gpio_out_6 | |
| 7 | gpio_in_7 | gpio_out_7 |