
Several gates are connected to 6 input pins.
Input 0 -> 1 Input 1 -> 0 Input 3 -> 1 Input 4 -> 1 Input 6 -> 1 Input 7 -> 0
The AND, OR, NAND and XOR gate should output 1.
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | input 0 | output and | |
| 1 | input 1 | output or | |
| 2 | output nand | ||
| 3 | input 3 | ||
| 4 | input 4 | ||
| 5 | |||
| 6 | input 6 | output xor | |
| 7 | input 7 |