676 brent-kung_4
676 : brent-kung_4
- Author: jalcim
- Description: brent-kung 4 bit do in 15 minute with matt :)
- GitHub repository
- Open in 3D viewer
- Clock: 0 Hz
How it works
3 input
- 4bit input_A
- 4bit input_B
- 1bit Cin
1 ouput
- 5bit out
How to test
iverilog brent-kung.v test.v && ./a.out && gtkwave signal_brent_kung.vcd
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | input_A[0] | out[0] | input_B[0] |
| 1 | input_A[1] | out[1] | input_B[1] |
| 2 | input_A[2] | out[2] | input_B[2] |
| 3 | input_A[3] | out[3] | input_B[3] |
| 4 | out[4] | ||
| 5 | |||
| 6 | |||
| 7 |