866 AXI-Stream Matrix Vector Multiplier
866 : AXI-Stream Matrix Vector Multiplier
- Author: Udara Suraweera
- Description: AXI-Stream Matrix Vector Multiplier with UART interface
- GitHub repository
- Open in 3D viewer
- Clock: 50000000 Hz
How it works
Documentation available on github.com/SkillSurf/systemverilog
How to test
Documentation available on github.com/SkillSurf/systemverilog
External hardware
Requires an external USB-FTDI interface for UART comms.
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | RX | TX | |
| 1 | |||
| 2 | |||
| 3 | |||
| 4 | |||
| 5 | |||
| 6 | |||
| 7 |