
A single leaky integrate and fire (LIF) neuron. This is the simplest spiking neuron model there is, and the unit cell of neuromorphic chips like Loihi/TrueNorth (this is 1 of them, those have a million).
There's an 8 bit membrane potential, V_MEM. Every clock:
SPIKE_IN goes through a 2 flop synchronizer + edge detector since it's coming off a switch that has nothing to do with the clock.
The 7 segment display shows the top nibble of V_MEM in hex, so you can watch it charge up (0, 1, 2 ... 8) and then snap back to 0 when it fires. The full 8 bits of V_MEM are also on uio[7:0] if you want to put a logic analyzer on it.
TT demo board, 7 seg on uo, dip switches on ui. Run the clock slow (10Hz to 1kHz or so) or you won't see anything happen.
| switch | what |
|---|---|
| ui[0] | SPIKE_IN, toggle it to inject a spike |
| ui[4:1] | WEIGHT, 0 to 15 |
| ui[6:5] | LEAK_SEL: 00 none, 01 = 1/tick, 10 = 2/tick, 11 = 4/tick |
| ui[7] | THRESH_SEL: 0 = fire at 128, 1 = fire at 64 |
Try this first:
SPIKE_OUT is uo[7] (the decimal point), V_MEM[7:0] is uio[7:0].
None, the demo board's 7 seg and dip switches are enough. Logic analyzer on uio[7:0] is nice to have.
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | SPIKE_IN | SEG_A | V_MEM[0] |
| 1 | WEIGHT[0] | SEG_B | V_MEM[1] |
| 2 | WEIGHT[1] | SEG_C | V_MEM[2] |
| 3 | WEIGHT[2] | SEG_D | V_MEM[3] |
| 4 | WEIGHT[3] | SEG_E | V_MEM[4] |
| 5 | LEAK_SEL[0] | SEG_F | V_MEM[5] |
| 6 | LEAK_SEL[1] | SEG_G | V_MEM[6] |
| 7 | THRESH_SEL | SPIKE_OUT | V_MEM[7] |