
This project implements a small Verilog controller that generates configurable digital control patterns for a programmable 4 × 4 metasurface array.
The two least significant input bits, ui_in[1:0], select one of four beam-control modes. Each mode produces a different 8-bit pattern on uo_out[7:0].
This initial design demonstrates the digital control principles used when configuring programmable antenna and metasurface elements.
| ui_in[1:0] | uo_out[7:0] |
|---|---|
00 |
00000001 |
01 |
00000010 |
10 |
00000100 |
11 |
00001000 |
The design currently uses combinational logic, so the output changes directly when the beam-mode input changes.
The clock, reset and bidirectional pins are not used in this version.
ena high.ui_in[1:0] to the required beam mode.uo_out[7:0].The automated cocotb testbench also verifies all four beam-mode selections.
To test the design physically, connect:
ui_in[0] and ui_in[1]uo_out[7:0]No external hardware is required for simulation.
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | Beam mode bit 0 | Control pattern bit 0 | |
| 1 | Beam mode bit 1 | Control pattern bit 1 | |
| 2 | Control pattern bit 2 | ||
| 3 | Control pattern bit 3 | ||
| 4 | Control pattern bit 4 | ||
| 5 | Control pattern bit 5 | ||
| 6 | Control pattern bit 6 | ||
| 7 | Control pattern bit 7 |